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[rinso1506]

22.1.3 The Baud Rate Divisor
The Baud Rate Divisor Register is a 16 bit register that shares I/O locations 3F8h/2F8h and 3F9h/2F9h with the data and interrupt enable registers. Bit seven of the Line Control Register (see "The Line Control Register") selects the divisor register or the data/interrupt enable registers.
The Baud Rate Divisor register lets you select the data transmission rate (properly called bits per second, or bps, not baud[4]). The following table lists the values you should write to these registers to control the transmission/reception rate:
Baud Rate Divisor Register Values
Bits Per Second 3F9/3F9 Value 3F8/2F8 Value
110 4 17h
300 1 80h
600 0 C0h
1200 0 60h
1800 0 40h
2400 0 30h
3600 0 20h
4800 0 18h
9600 0 0Ch
19.2K 0 6
38.4K 0 3
56K 0 1
You should only operate at speeds greater than 19.2K on fast PCs with high performance SCCs (e.g., 16450 or 16550). Furthermore, you should use high quality cables and keep your cables very short when running at high speeds.